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| AWT4502S10 TX Power MMIC Advanced Product Information - Rev 0 FEATURES * * * * * * * * * High Linearity. Low Quiescent Current. Intelligent Power ManagementTM with Temperature Compensation. Low Harmonics. Small Size. 16 Pin SSOP Plastic Package. Surface Mount Package 50 Input Impedance Low Cost APPLICATIONS * PCS CDMA/TDMA Wireless handset applications. S10 16 Pin SSOP with Heat Slug Description The AWT4502 is a monolithic power amplifier IC suited for 3 Volt PCS CDMA/TDMA wireless handset applications. Maximum Ratings Static sensitive electronic devices. Do not operate or store near strong electrostatic, fields. Take proper ESD precautions. PIN 1 2 3 4 8 9 11, 12,13, 14 DESCIPTION V D1 RFIN VREF V DDC V SS V D2 V D3 RATING +8V max, 0.0V min +12 dBm max +5V max, 0.0V min +7.5V max, 0.0V min (-) 5V +8V max, 0.0V min +8V max, 0.0V min With no RF Applied With no RF Applied NOTES With no RF Applied VD =+5.0 Volts Must be presented during operation. AWT4502S10 Electrical Characteristics (Pin < 3dBm, VDS 1, 2, 3=+3.5 V; VDDC = 3.1V; VSS = (-) 3V, Set VREF(Pin 3) to get IDQ of 140mA; TC = 25 C, 50 Input 50 external output match)* Parameter Frequency Power Output Intermodulation Distortion Power Added Efficiency @ POUT = 28.5dBm Gain Harmonics (@ 28.5dBm) Stability: -80dBc all spurious outputs relative to desired signal Input Return Loss Operating Range Negative Voltage Current Biasing Current (VDDC Pin) Biasing Current (VREF Pin) Quiescent Current (Idsq1 + Idsq2 + Idsq3) Symbol fo Pout IM3 IM5 IM7 PAE 2fo 3fo 4fo RTNIN TC ISS IDDC IREF IDSQ Min 1850 28.5 Typ -26 -36 -45 32 26 <-45 <-40 <-40 6:1 12 Max 1910 Unit MHz dB m dB c % dB dB c VSWR load, all phase angles, (POUT < 28.5 dBm) VDS = +3.4, Zs = 50 dB C mA mA mA mA -20 - +70 3 2.5 1.5 140 - * As measured in ANADIGICS test fixture. Recommended Operating Procedure on the Evaluation Board Power Up A. Begin by setting all power supplies to 0.0 Volts, and input power to 0 dBm. B. Make sure that the RF input power is turned off. C. Turn on VSS (Pin 3) to (-) 3V. D. Turn VDS1 (Pin 1), VDS2 (Pin 9), VDS3 (Pins 11, 12, 13 and 14) and VDDC (Pin 4) which are tied together on the fixture, and set to +3.5V and set VREF (Pin 3) for IDQ of 140 mA E. Turn RF on and adjust input power to get POUT = 28.5 dBm. Power Down To power down the device follow the above procedure in reverse order. 2 AWT4502S10 AWT4502 Fixture Schematic VREF VDDC TS2 AWT4502 VSS = -3.0 VDC VDDC = +3.1 VDC VBC = 1.2 to 3.0 VDC VD1, VD2, VD3 = 3.5 VDC Pin 1 2 3* 4 5 6 8 9 10, 15 11, 12, 13, 14 16 Signal V D1 RFIN VREF V DDC GND VTS2 V SS V D2 GND VD3/RFOUT VG3 Description Drain of the 1st stage (+3.5V) RF power input, DC blocked Part of biasing control circuit should be set to get IDQ of 140mA Bias circuit supply (+3.1V) RF and DC Ground Dynamic Bias Resistor Negative supply (-3V) Drain of the 2nd stage (+3.5V) RF and DC ground Drain of 3rd stage (+3.5V) and RFOUT Gate of 1st stage (bias indication and tuning) *This voltage is being adjusted to get IDQ of 140mA, the voltage range is 1.2-3V. 3 AWT4502S10 CASE OUTLINE AND PIN DESCRIPTION 4 AWT4502S10 NOTES 5 AWT4502S10 NOTES 6 AWT4502S10 NOTES 7 AWT4502S10 ANADIGICS, Inc. 35 Technology Drive Warren, New Jersey 07059 Tel: (908) 668-5000 Fax: (908) 668-5132 http://www.anadigics.com Mktg@anadigics.com IMPORTANT NOTICE ANADIGICS, Inc. reserves the right to make changes to its products or discontinue any product at any time without notice. The Advanced Product data sheets and product specifications contained in this data sheet are subject to change prior to a products formal introduction. The information in this data sheet has been carefully checked and is assumed to be reliable. However, ANADIGICS assumes no responsibility for inaccuracies. ANADIGICS strongly urges customers to verify that the information they are using is current before placing orders. WARNING ANADIGICS products are not intended for use in life support appliances, devices, or systems. Use of an ANADIGICS product in any such application without written consent is prohibited. 8 |
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